ASML and TSMC want bigger masks for smaller chips
Industry push aims to eliminate stitching constraints and ready high-NA EUV systems for production by 2033
SYSTEMS
ASML and TSMC want bigger masks for smaller chips
Industry push aims to eliminate stitching constraints and ready high-NA EUV systems for production by 2033
ASML and chipmaking giant TSMC have launched an industry-wide push toward 12-inch photomasks, saying the larger format could lower costs and overcome some limitations of high-NA EUV lithography.
Dutch firm ASML, the only commercial supplier of EUV lithography systems, says it and TSMC have established a collaboration intended to lead the transition to larger-format photomasks for extreme ultraviolet (EUV) lithography.
Intel Foundry and Samsung Electronics have also voiced their support.
The initiative aims to establish a 12-inch mask pilot line by 2031 and have the supporting lithography systems ready for advanced node production by 2033.
According to ASML, high-NA EUV will initially enter production using current 6-inch masks, but moving to 12-inch masks could increase fab productivity, lower costs, and remove stitching constraints.
The push for larger masks stems from the anamorphic optical design ASML adopted for its first generation of high-NA EUV machines so chipmakers could continue using existing 6-inch masks.
The "NA" in high-NA EUV stands for numerical aperture – a measure of an optical system's ability to collect and focus light. Achieving a higher NA required larger optics, which increased the angle at which light strikes the reticle, or mask, creating shadowing and contrast problems.
ASML says it could have used optics that reduced the mask pattern by 8x in both directions, rather than the 4x used in existing systems, but that would have required larger masks. Instead, it adopted anamorphic optics that reduce the image by 4x in one axis and 8x in the other, allowing chipmakers to continue using 6-inch masks.
The trade-off is an exposure field half the size of that in previous machines. Large dies that exceed this field may therefore require two separately exposed patterns to be stitched together, adding complexity and reducing productivity.
ASML and TSMC now see larger masks as a way to restore the full exposure field as the industry pushes toward denser chips and smaller process nodes.
"We expect the adoption of High NA EUV to increase progressively along the device scaling roadmap, first using current 6-inch masks and then further supported by 12-inch masks, which enable greater scanner productivity and allow the industry to meet the demand for smaller, faster and more energy-efficient chips," said ASML president and CEO Christophe Fouquet.
TSMC has so far not used high-NA EUV, including for its 2 nm process, but says it intends to deploy the technology in high-volume manufacturing for advanced nodes beginning in 2030. It expects the number of layers requiring high-NA EUV will rise as new process nodes are introduced, driven by increasingly complex transistor architectures required for AI applications.
Intel Foundry signaled its support for the initiative, with EVP Naga Chandrasekaran saying: "Within our lithography capabilities, Intel Foundry is focused on near term enablement of high-NA on 6-inch masks with or without stitching, and making the transition to 6x12-inch masks. We will continue to work closely with ASML and the entire industry to enable this transition."
Samsung is also backing the initiative and says it plans to become the first chipmaker to introduce ASML's high-NA EUV technology into high-volume DRAM manufacturing by 2028.
"The AI era is transforming the semiconductor industry and increasing the importance of technological innovation across the entire value chain," said Samsung Electronics vice chairman and CEO Young Hyun Jun.
"By further strengthening our collaboration with ASML, we are helping lay the foundation for the next generation of AI and semiconductor innovation."
IDC senior research director Andrew Buss told The Register that high-NA EUV creates design and manufacturing challenges for future products. Although reticle stitching and chiplet designs can mitigate these, he said, the move to 6 x 12-inch photomasks is a necessary step comparable to the industry's transition from 200 mm to 300 mm wafers.
Buss said the transition would require toolmakers, chip manufacturers, mask suppliers, and designers to align their technologies and processes, making broad industry participation essential. ®
Originally published on The Register


